Topic: computer architecture

topics > computer science > Group: computer hardware

digital communication
computer science
computer hardware
machine model
operating system
parallel processing

analog processor
associative memory
broadcasting information
channel multiplexing
computer performance
data caching
data flow machines
hardware for interprocess communication
hardware vs. software
history of computers
IEEE488 instrument bus
implementing distributed systems and applications
interprocess communication
laboratory computers
managing shared memory
massively parallel processors
memory cache
memory management by paging
multiple processors
operating system security
RISC computer architecture
software portability
stack machine
vector processing
virtual memory
virtualized hardware
von Neumann computer


LSI technology requires new approaches to computer hardware because of its high development cost and large number of components. Just the sheer number of components on an LSI chip requires automated design with repetitive components. LSI technology offers the possibility of hardware solutions to existing software problems. It allows large multi-processor networks and very large memories. (cbb 5/80)
Subtopic: computer architecture up

Quote: the IBM 360 has a systematic architecture; condition code, registers, memory, 8-bit bytes, 32-bit integers, 32 and 64-bit reals, two's complement [»wirtN1_1968]

Subtopic: computer design up

Quote: behavioral modeling is mandatory for computer design; reveals areas of uncertainty, forces subtle problems into the open, deal with all issues together [»colwRP_2006]
Quote: preparation before realization; the refinement stage of development selects one alternative and creates the project scaffolding for the realization phase [»colwRP_2006]
Quote: use truth tables to prove theorems about hindrances, i.e., open or closed circuits; e.g., associative and distributive laws [»shanCE6_1938]
Quote: how to construct a relay switching circuit from equations of the independent and dependent variables [»shanCE6_1938]
Quote: can use relay circuits for complex mathematical operations; anything using a finite number of steps of 'if', 'or', 'and', etc.; e.g., adding two numbers [»shanCE6_1938]
Quote: track the number of new RTL lines per week, the running total and estimates; can predict the final RTL size from the rate of increase [»colwRP_2006]
Quote: need to overshoot in selective areas of a design, otherwise unwelcome realities will lead to failure [»colwRP_2006]
Quote: complexity is a living, growing monster; degrades project goals while hiding the fact that it has done so; P6 Simplification Effort was a success [»colwRP_2006]

Subtopic: design review up

Quote: formal design reviews with 10 to 20 other interested designers and observers [»colwRP_2006]
Quote: in a design review describe the context, function, constraints, alternatives, block diagram, timing diagrams, protocols, and controllers [»colwRP_2006]
Quote: a design review produces a list of ideas, objections, concerns, and issues; produce a plan for addressing the issues and resolving all open items [»colwRP_2006]

Subtopic: sequential vs. random up

Quote: sequential disk access is 500 times faster than random access; think of disk as a sequential device [»grayJ6_2003]

Subtopic: communication up

Quote: use video-taped lectures to convey design information; include Q&A; new hires quickly learn names, operations, and people [»colwRP_2006]

Subtopic: software architecture up

Quote: design patterns are reusable experience; building blocks for more complex design; microarchitecture [»gammE7_1993]

Subtopic: cluster computing up

Quote: energy efficiency and price-performance are the primary factors for Google clusters
Quote: depreciation is larger than power and cooling; servers last only 2-3 years [»barrLA3_2003]

Subtopic: power reduction up

Quote: worst-case thermal dissipation for microprocessors is a critical problem; eventually stops development [»colwRP_2006]
Quote: survey of power reduction techniques for circuits to architectures, system software, and applications [»venkV9_2005]
Quote: the power density and heat generation of computers is approaching that of nuclear reactors

Subtopic: memory up

Quote: hardware memory consistency should enforce sequential consistency with relaxed write-to-read order; other relaxed models too complicated [»hillMD8_1998]
Quote: how to optimize programs for cache memory; unless hit rate 98% programs run at memory speed instead of processor speed [»searCB10_2000]

Subtopic: instruction set up

Quote: use the same order code for new machines since the library of subroutines may be as valuable as the machine itself
Quote: earliest instruction sets for a computer and first program [»knutDE12_1970]
Quote: add a full vector architecture to x86 and PowerPC; via their multimedia extensions; keeps the memory system busy [»gebiJ4_2007]
Quote: IBM 360 cells contain a value; arrays contain an ordered set of cells; operations are a mapping from operands to results [»wirtN1_1968]
Quote: the Mesa instruction set is designed for compactness; average instruction length is 1.45 bytes [»johnRK3_1982]
Quote: on Mesa, code is about half the size of conventional architectures [»johnRK3_1982]
Quote: Babbage's analytical engine detected overflow carries; used for determining events

Subtopic: hardware security up

Quote: Intel x86 provides segment protection levels and page protection levels [»chiuTC3_1999]
Quote: on Intel architectures, an interrupt gate allows user processes to call kernel services [»chiuTC3_1999]
Quote: use 'ret' to call a less-privileged extension, and 'call' to return from the extension [»chiuTC3_1999]
Quote: 10x cost for hardware-based extensions vs. 40x cost for kernel-process call-return; also, avoids TLB misses [»chiuTC3_1999]

Subtopic: coprocessor to generate machine code up

Quote: instruction coprocessor generates machine code for intermediate codes; 2x faster, problem of jumps [»debaEH_1990]

Subtopic: graphics processor up

Quote: Accelerator uses data parallelism to program GPUs using a conventional imperative language; within 50% of hand-written code; up to 18x faster than C [»tardD10_2006]

Subtopic: optimization for energy co up

Quote: can reduce energy consumption by assigning register labels to minimize switching costs; also compiler optimizations and better algorithms [»mehtR8_1997]

Subtopic: other features up

Quote: the Ferranti Mark I included a real-time clock accurate to five seconds [»turiA3_1951]
Quote: the Ferranti Mark I included a hardware random number generator; e.g., random walk probability [»turiA3_1951]

Subtopic: large-scale integration up

Quote: microcomputers will demand LSI hardware solutions instead of general-purpose tools [»controleng]

Subtopic: chip multi-processors up

Quote: chip multi-processors reduce interconnect delays by partitioning the microarchitecture into localized processing elements [»hammL9_1997]
Quote: chip multi-processors are a good fit for billion-transistor chip designs

Subtopic: connection machine up

Quote: description of the CM-1 Connection Machine; 64K cells, 4K bits memory each, 1-bit ALU, boolean n-cube topology, host computer [»hillWD_1985]
Quote: description of wide microinstruction for CM-1 Connection Machine; truth table on 2 bits and 16 flags, N/E/S/W pins for I/O [»hillWD_1985, OK]
Quote: the communications network of the Connection Machine does most of the computation, limits the performance, and costs the most [»hillWD_1985]
Quote: in computers, wires are much of the cost, space and delay times

Subtopic: hardware support for object-orientation up

Quote: can provide hardware support of object types and their operations [»rattJ3_1982]

Related Topics up

Group: digital communication   (11 topics, 296 quotes)
Group: computer science   (871 topics, 23489 quotes)
Group: engineering   (30 topics, 303 quotes)
Group: input/output   (4 topics, 74 quotes)
Group: computer hardware   (24 topics, 343 quotes)
Group: machine model   (13 topics, 206 quotes)
Group: operating system   (27 topics, 924 quotes)
Group: parallel processing   (41 topics, 1125 quotes)

Topic: analog processor (5 items)
Topic: architecture (14 items)
Topic: associative memory (5 items)
Topic: broadcasting information (18 items)
Topic: calculator (1 item)
Topic: channel multiplexing (3 items)
Topic: computer performance (14 items)
Topic: data caching (35 items)
Topic: data flow machines (14 items)
Topic: hardware for interprocess communication (31 items)
Topic: hardware vs. software (15 items)
Topic: history of computers (66 items)
Topic: IEEE488 instrument bus (2 items)
Topic: implementing distributed systems and applications (41 items)
Topic: interprocess communication (29 items)
Topic: interrupts (25 items)
Topic: laboratory computers (2 items)
Topic: managing shared memory (74 items)
Topic: massively parallel processors (29 items)
Topic: memory cache (29 items)
Topic: memory management by paging (23 items)
Topic: multiple processors (10 items)
Topic: operating system security (18 items)
Topic: RISC computer architecture (11 items)
Topic: software portability (43 items)
Topic: stack machine (10 items)
Topic: vector processing (15 items)
Topic: virtual memory (32 items)
Topic: virtualized hardware (5 items)
Topic: von Neumann computer
(14 items)

Updated barberCB 8/05
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Thesa is a trademark of C. Bradford Barber.