Quote: use a hardware-walked, nested page table for VMMs; translates guest virtual addresses to host physical addresses; fast guest context switches and slightly slower TLB misses

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We are optimistic about the potential of future … faults, and context-switch costs were successfully addressed with … [Osisek et al, IBM Systems J 30.1:34-51 1991]. Both AMD's "nested paging" [ref] and Intel's "EPT" [ref] proposals for MMU virtualization are similar to the SIE design. … the VMM maintains a hardware-walked "nested page table" … handle guest MMU operations, eliminating the need for … the TLB contains entries mapping guest virtual addresses … [By] eliminating trace overheads and allowing guest context … , nested paging hardware should easily repay the …   Google-1   Google-2

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