Topic:
computer architecture
Topic:
computer performance
Topic:
handling complexity
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Subtopic: RISC hardware 
| Quote: with simple hardware, the compiler is complex but program execution is simple and efficient [»hennJ3_1982]
| | Quote: instead of a stack machine, use load/store architectures without condition codes [»hennJ3_1982]
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Subtopic: condition codes
| Quote: hardware condition codes are difficult to implement because they are updated as side-effects; irregular structure [»hennJ3_1982]
| | Quote: instead of condition codes, MIPS uses a compare and branch instruction with 16 possible comparisons [»hennJ3_1982]
| | Quote: when condition codes are needed, MIPS has a Set Conditional instruction that sets a register to 0 or 1 [»hennJ3_1982]
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Subtopic: branching
| Quote: in a pipelined architecture, a branch is much more expensive than computation [»hennJ3_1982]
| | Quote: MIPS uses delay slots for all branches [»hennJ3_1982]
| | Quote: the MIPS compiler reorganizes codes or inserts no-ops to avoid pipeline interlocks; uses follow sets [»hennJ3_1982]
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Subtopic: packed data
| Quote: MIPS provides special instructions for accessing bytes in packed arrays [»hennJ3_1982]
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Subtopic: cost of RISC programs
| Quote: RISC programs take two and a half times more memory then those for complex instructions sets [»daviJW6_1987]
| | Quote: RISC architectures can take more compilation time [?]
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Related Topics
Topic: computer architecture (46 items)
Topic: computer performance (14 items)
Topic: handling complexity
(60 items)
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