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Topic: requirement specification by behaviors
topics >
computer science >
programming >
automated tests of specifications and designs
Topic:
calculus of communicating processes
Topic:
communication protocols
Topic:
debugging by usage rules
Topic:
model checker
Topic:
Petri net transitions and events
Topic:
proving concurrent programs
Topic:
requirement specification by assertion
Topic:
safety, liveness, and system properties
Topic:
software models of reality
Topic:
specification and design of distributed systems
Topic:
state machine
Subtopic: specification as trace of function calls
Quote: when designing a class, it is important to specify the expected behavior of virtual functions Quote: describe modules by the observable event sequences (traces) at their interface Quote: a system behavior is an alternating sequence of states (interface) and agents (system or environment) [»abadM1_1993] Quote: a requirements specification describes a system's modes of operation, events that change modes, and invariant, safety properties [»atleJM1_1993] Quote: a property is a set of system behaviors; verify for each possible system execution [»abadM1_1993]
Subtopic: specification as interface
Quote: a specification is complete and consistent if every legal trace of a module's function calls yields only one value [»bartW12_1977]
Subtopic: specification as state machine
Quote: a specification is a formal description of the interface between a system and its environment
Subtopic: specification from behavior
Quote: a state machine defines the legal ordering of states over time; how the current behavior depends on the past [»boocG_1999] Quote: specify requirements by a mode machine; each modeclass describes one aspect of system behavior by modes and transitions [»atleJM1_1993] Quote: an event is an instantaneous change in an environmental condition; input to a mode-machine [»atleJM1_1993] Quote: automatically propagate redundant information in a mode transition table; e.g., simultaneous mode transitions [»atleJM1_1993] Quote: a virtual finite state machine (VFSM) is state, action, and condition names combined with AND and OR; names and enumerations are primary [»wagnF5_1992] Quote: specify control flow and abstract system behavior with a virtual finite state machine (VFSM); may be executed [»wagnF5_1992]
Subtopic: event sequences
Quote: a call trace of an API or ADT consists of feasible and error-free paths; while a program's text contains infeasible and buggy paths Quote: specification mining analyzes a program's trace of API or ADT calls; produces state machines with temporal and data dependencies [»ammoG1_2002]
Quote: use explicit internal state functions to help specify all permitted sequences of interface actions [»lampL1_1989]
Topic: automated tests of specifications and designs (12 items)
Topic: calculus of communicating processes (13 items)
Topic: communication protocols (62 items)
Topic: debugging by usage rules (41 items)
Topic: model checker (49 items)
Topic: Petri net transitions and events (21 items)
Topic: proving concurrent programs (37 items)
Topic: requirement specification by assertion (28 items)
Topic: safety, liveness, and system properties (22 items)
Topic: software models of reality (24 items)
Topic: specification and design of distributed systems (14 items)
Topic: state machine
(67 items)