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Topic: interrupts

topics > computer science > Group: parallel processing



Topic:
asynchronous processing
Topic:
computer architecture
Topic:
events
Topic:
interrupt handler
Topic:
exceptions and undesired events
Topic:
high priority processes
Topic:
interrupting interpersonal communication
Topic:
non-preemptive task scheduling
Topic:
task scheduling
Topic:
waitfor condition in parallel processing

Summary

An interrupt suspends current execution and temporarily switches context to an interrupt handler. Interrupts can be prioritized with high priority interrupts interrupting low priority interrupt handlers. Interrupts allow multiple dimensions during linear execution. They are the interface between executing sequences. They are especially useful for the user, allowing his actions and requests to interleave with computer processing. The idea of interrupts may include software interrupts. (cbb 5/80)
Subtopic: interrupt up

Quote: with processor sharing, any statement can be interrupted for an unknown period [»wirtN8_1977]
Quote: asynchronous exceptions, interrupts, and timeouts are important for robust, modular programs but are difficult to represent in a programming language [»marlS6_2001]

Subtopic: clock interrupt up

Quote: use an interrupting clock to regulate the bottom layer of the operating system [»dijkEW2_1971]
Quote: on-chip timer interrupts are scheduled and canceled at the cost of a register access [»aronM8_2000]
Quote: back up soft timers with on-chip timer interrupts; low overhead

Subtopic: identifying interrupts up

Quote: instead of querying devices, MIPS includes a 'surprise code' with each interrupt; pipe stage, type, and device-specific information [»hennJ3_1982]

Subtopic: interrupt as save-restore up

QuoteRef: cbb_1973 ;;3/3/74 interrupts are always a change of state with the ability to restore the previous state
QuoteRef: cbb_1973 ;;3/15/74 interrupt save-restore is so that the words remain independent--essential running parallel on same equipment

Subtopic: interrupt a task up

Quote: a DELTA event sends an interrupt to an object by appending a task pattern to the object's agenda; executed if higher priority [»handP_1981]
Quote: a CONTROL set includes actions such as set variables, trigger sets, analog I/O, timing, and interrupt a named set [»ruhlRC11_1976, OK]
Quote: alert added to OWL is prevent dangerous behavior by the walking machine [»donnMD_1987]

Subtopic: interrupts in functional language up

Quote: use scoped combinators in Haskell for block and unblocking asynchronous interrupts; formal semantics
Quote: can interrupt a purely-functional computation at any point; allows asynchronous exceptions [»marlS6_2001]

Subtopic: replay of interrupt trace up

Quote: use software counters to allow deterministic replay of interrupts for log-based recovery of shared memory access on uniprocessor; 6-8% slowdown [»slyeJH10_1998]
Quote: count backward branches to replay asynchronous interrupts [»slyeJH10_1998]

Subtopic: interrupt->process up

Quote: most concurrent languages disallow asynchronous signaling; provide polling or safe points for receiving signals
Quote: need to map asynchronous events such as interrupts and exceptions to a process model as quickly as possible [»stroB_1994]
Quote: AlertWait waits on a mutex and condition variable until a signal or explicit alert; an alert raises an exception [»birrAD_1991]
Quote: use TestAlert during long-running computations to allow thread interruption
Quote: use efficient, trigger states and timing wheels for soft timers; end of system call, end of exception handler, end of interrupt handler, idle loop [»aronM8_2000]

Subtopic: interrupt gate up

Quote: on Intel architectures, an interrupt gate allows user processes to call kernel services [»chiuTC3_1999]

Subtopic: avoid interrupt up

Quote: used soft-timers for rate-based clocking of TCP and network polling to avoid interrupts; 25% faster Web server [»aronM8_2000]
Quote: use threads instead of polling, waiting, and interrupts; each operation is a single, synchronous procedure [»mcjoPR1_1989]
Quote: hardware timer interrupts are expensive; context switch, highest priority, poor cache locality [»aronM8_2000]
Quote: signals and interrupts do not work with many log-based, rollback-recovery protocols; they require piecewise determinism between messages [»slyeJH10_1998]


Related Topics up

Topic: asynchronous processing (30 items)
Topic: computer architecture (46 items)
Topic: events (44 items)
Topic: interrupt handler (20 items)
Topic: exceptions and undesired events (29 items)
Topic: high priority processes (13 items)
Topic: interrupting interpersonal communication (13 items)
Topic: non-preemptive task scheduling (16 items)
Topic: task scheduling (49 items)
Topic: waitfor condition in parallel processing
(20 items)

Updated barberCB 3/06
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